[sdiy] Prom generating TOS like MK50240 bits..

[Veronica Merryfield]

On 2012-04-20, at 2:43 AM, Tom Wiltshire wrote:

> Anyway, my best guess for a solution would be to use 12 super-small, super-simple chips to simply output the states for *one* note. This requires a maximum of 478 different outputs, and perhaps twice that for ROM if it takes you two instructions to output a literal to a pin. So you'd take 12 of these:
> 
> http://www.microchip.com/wwwproducts/Devices.aspx?dDocName=en019863
> 
> (6-pin, SOT-23, costs $0.30 - total under $4)
> These all have their own internal 4MHz RC clock, so you won't get phase locking, and you will get some temp drift - hey, it's almost an *analog* solution! Alternatively, find a similar chip that accepts an external clock and clock all 12 uPs from one master clock, locking the phases and making it sound like a cheap Italian organ from the 70s.
> Currently, that's the best way I can see - but I don't use CPLD/FPGAs, which probably offer another route.

I have gone round the houses looking at the TOG problem a couple of times. I use to have a transcendent DPX (5 octave string/brass synth). I liked the sound and it could be very lush, but it was very noisy although if used as back strings, it worked well.

It should fit within a smallish programmable logic device. It needs 98 FFs (one octave) or 99 FFs (one octave+one note), 4x9bit comparator, 6x8bit comparator and 2x7bit comparator - 180 2 input ANDs. One could do it in discrete logic - 12 8-bit counters + 4FF for the bit bit counters and lots of AND gates.

It could also be done as a scheduler in a PIC like device. TOG chips mostly used a 2Mhz clock IIRC which means a timer with 0.5us resolution would be needed together with a decent instruction clocking speed to service that timer. In principle an event queue is maintained. The problem is dealing with events that are very close together and there are going to be a lot of them so it would be quite the juggling act. My experience of doing a similar thing is in engine controllers where typically there are a lot of timers and a lot more events, but a 30Mhz processor could do it along with comms, sensor reading and table lookups. The more timers that the MCU has, the easier it gets since the event processing gets less congested (less times where one is processing several on the same timer). This congestion will lead to some dithering which can either be corrected at the next event, or left to give that analog drift feel.

One could also do it as a 12 note phase accumulator but it would need enough CPU horse power to do the math on 12 channels at some desired resolution. Say the resolution were 44Khz, it would require 6 to 8 MIPS assuming at least 10bit - dealing with overflow accumulation needs just over twice as many MIPS. It might be feasible to do half an octave in a small pic - 3-4 MIPS needed, and possibly all in registers (no RAM access).

If one were doing it in small chunks, one could use a small pic to do as many notes as there are timers available - treat each device as a multi-channel self programmable timer. 

In the case of coming up with a 61 note string synth, it seemed to me that having gone this far with a logic device, one might as well going the extra stage and put the other 49FF and output on 61 pins, or also add in the octave mixing (more AND gates). It doesn't take long then to get to the point of putting it all in there - key scanner in, square wave based audio out.

Just some musings.

Veronica