[sdiy] Prom generating TOS like MK50240 bits..

[Tom Wiltshire]

On 19 Apr 2012, at 18:15, nvawter at media.mit.edu wrote:

> Quoting Tom Wiltshire <tom at electricdruid.net>:
> 
>> Thinking about it more, though, it's the least common *multiple* which is crucial, not the factors.
>> Multiply all these, Least Common Multiple = 1.4163158499841E+22
>> 
>> Still very big, but we're under a yottabyte this time!
> 
> 
> Ah yes!  Glad you reminded me it's least common multiple...  that
> reduces my implementation to:
> 32*27*25*7*17*19*23 = 1123264800
> l(.)/l(2)
> 30.06505092474673512219, e.g. 2^30.065
> 
> So, that's just a little over 1 Gig addresses!
> 
> Shockingly enough, you can by 1Gb flash mems for ~$6 now.
> Since you'd need 11-12 of them (one for each note), that's about $66....
> or, just use a single 16Gb flash chip for $11.73!!!
> 
> If you were to clock it at e.g. 14080 kHz, the /32 output would result in A440 and the chip would only repeat every 19 hours!
> 
> 
> With some interesting features... for instance, you could scramble, randomize, wow, flutter, and otherwise perturb the outrageously long word inside the memory to get variations and reduce phase-locking...
> 

One thing I don't understand; are you using more than one bit for each output? if so, why? The point is that if we had a 16-bit memory, we could store the next state for all 13 outputs and have 3 bits left over. In which case we need only one large 16-bit memory, not 12.

However, since the problem gets worse the more outputs you try and combine onto a single chip, perhaps it's worth looking at the problem in pieces.
Say we broke it into 4. Which outputs would you put on each chip to get the smallest possible memory size? (e.g. which ratios combine to give the smallest least common multiple?).
This would reduce the problem enormously, although it would require 4 sets of address counters. For example 478x358x239 = 40,898,636 - only 27 bits required for the address!

To be honest, I still don't think this is a viable way to go. I've thought quite a lot about this problem on and off over the last few years. It's a classic "can it be done on a $1 PIC?" problem, which is why it appeals to me - I don't actually need or really see the point of a top octave generator chip.

Anyway, my best guess for a solution would be to use 12 super-small, super-simple chips to simply output the states for *one* note. This requires a maximum of 478 different outputs, and perhaps twice that for ROM if it takes you two instructions to output a literal to a pin. So you'd take 12 of these:

http://www.microchip.com/wwwproducts/Devices.aspx?dDocName=en019863

(6-pin, SOT-23, costs $0.30 - total under $4)
These all have their own internal 4MHz RC clock, so you won't get phase locking, and you will get some temp drift - hey, it's almost an *analog* solution! Alternatively, find a similar chip that accepts an external clock and clock all 12 uPs from one master clock, locking the phases and making it sound like a cheap Italian organ from the 70s.
Currently, that's the best way I can see - but I don't use CPLD/FPGAs, which probably offer another route.

Regards,
Tom