[sdiy] Designing Analog ICs

[David Schwan]

Several comments:

1) Mosis does support the kind of old bipolar process needed for most Synth DIY chips. Even if Mosis did support the right process, it would cost $10K - $15K for 40 parts.

2) Tooling costs will be about $2K per layer, with maybe 13-14 layers max. 

3) One engineering lot could be 10-20 wafers, $400 to $500 a wafer. Likely 6" wafers

4) Packaging? I have no idea what the cost is.

5) What you likely need is a 40V bipolar process with device models. Preferred is 2 layers of Metal. Needs to have some form of capacitor, and two types of resistors, hopefully with opposite tempco's

6) Electric Editor is built for CMOS, not bipolar.

7) Assume versions A and B don't work. Assume that they can be tweaked with Metal layers only.

8) You will need to write a DRC rule deck for some tool.

9) Since this is Bipolar, LVS will be hand checked.

10) This design is not like doing a PCB, If you haven't done it before you're in for a real learning experience.


Note: 
I have 30 years experience designing analog and RF chips including old stuff like 40V bipolar.