[sdiy] FPGA

[Matthew Smith]

Quoth James Elliott at 31/10/11 13:44...
...
> Once you have the CSV output file from the pinplanner
> how do you get that in a format suitable for a PCB fab house?

It's not quite as simple as that. All the CSV file does is give you a 
list of which ports (as in the ports you declared in the original HDL) 
corresponding to the physical pins of the FPGA. It doesn't magically 
design a board for you!

The board needs to be laid out in the PCB CAD software of your choice - 
I use Eagle.

I have already created a footprint for the FPGA in question in Eagle, 
ditto for the other components that are going on the board, for which 
there aren't already library components which I can use.

For comparison, if I were using a microcontroller, without writing a 
single line of software, I could lay out my board as I could say that 
component X would be connected to, say, port A of the microcontroller.

However, with the FPGA, until I have either written the HDL to configure 
it - or used PlanAhead and done the pin planning as described - I would 
have no idea as to what the user pins (as opposed to power pins, 
configuration pins, JTAG pins, etc) would do.

So I have a footprint with a lot of pin numbers, but I don't know what 
they are going to do. This is where the CSV that PlanAhead spits out 
comes in.  Referring to the CSV, I can connect the appropriate nets to 
the appropriate pins in the schematic editor, THEN I can lay out and 
route the board.

As regards getting the board fabricated, you would generally need to 
export Gerber files from your CAD software. I, however, get my PCBs done 
here: http://dorkbotpdx.org/wiki/pcb_order  All I need to do is to 
e-mail the .brd (board) file from Eagle - without exporting anything. 
Some PCB houses give away their own software, and I would expect that 
they would also have a very simple way of turning the layout into an 
order - because they want it to be as easy as possible for the customer 
to give them $$$!

Just to complete the picture, if I were using a CPLD rather than an FPGA 
or microcontroller, I really WOULD need to write the software first. 
The fitter report from the ISE would tell me which pins were assigned to 
which ports given in my HDL.  (This is my understanding of it, anyway - 
that there is far less flexibility in pin assignment with CPLDs than 
there is with FPGAs - and it's best to leave it to the fitter to do it 
automatically.)

If you don't really feel like doing battle with PCB CAD software as well 
as the FPGA development software, do what Scott does, and just use a 
commercially available development board. I am doing it this way as I 
like doing board design, and to have created the whole thing from a 
component level up.

Hope this helps!

Cheers

M

-- 
Matthew Smith

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