[sdiy] FPGA

[James Elliott]

----- Original Message -----
> From: Matthew Smith <matt at smiffytech.com>
> To: James Elliott <johans121 at yahoo.com>
> Cc: "synth-diy at dropmix.xs4all.nl" <synth-diy at dropmix.xs4all.nl>
> Sent: Sunday, October 30, 2011 12:36 AM
> Subject: Re: [sdiy] FPGA
> 
> Quoth James Elliott at 30/10/11 14:15...
>>  ...My biggest concern at this point is not necessarily
>>  in the programming but in actually building a a
>>  complete "system", that is FPGA, clock, ADC,
>>  DAC, inputs, outputs, memory.
> 
> Are you saying to you want to build a board, and then take the "fix it in 
> software" approach?


If I am able to do this, then yes, that will be the approach I take. 


> If so, and if you are using Xilinx Spartan devices, the PlanAhead software that 
> comes with The (free) ISE WebPack should allow you to do this.
> 
> As I can't figure how to cut'n'paste an unmangled link from Google, 
> just search for: http://www.google.com/search?q=planahead%20user%20guide
> 
> Have a look at the pin planning section.  Just been through the exercise myself 
> - FPGA, RAM, parallel DAC, SPI EEPROM, SPI control, clock. All I'm 
> interested in at the moment is being able to get the PCB design done. Only 
> needed to specify the inputs and outputs using a Verilog skeleton (I believe you 
> can even do it with a CSV file,) so once I'd got the hang of the software, 
> it was pretty straighforward.

This is excellent information!!! Thank you!

> So I can send the PCB file off for fabrication & worry about writing the HDL 
> later.

Once you have the CSV output file from the pinplanner how do you get that in a format suitable for a PCB fab house? (I"ve never had a board fabricated for me)

Thanks,
Jim