[sdiy] LAG circuit de-tuning VCO question
ASSI
Stromeko at nexgo.de
Sat Nov 5 15:16:24 CET 2011
On Saturday 05 November 2011, Tom Wiltshire wrote:
> Let me rephrase that - the series resistance at DC should be infinite,
> right? Hence no leakage.
The series resistance at DC does not come into play, as by defintion the
capacitance will present an even higher resistance. The leakage, if you
must model it as a resistance (which would be a very crude model for almost
all capacitors), is _parallel_ to the capacitance and has no direct relation
to the ESR.
Regards,
Achim.
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