[sdiy] LAG circuit de-tuning VCO question

[Neil Johnson]

Tom Wiltshire wrote:
> Wouldn't the series resistance of the capacitor have an effect in
> this circuit too? It'd effectively make the lower end of a potential
> divider. I'd have thought you'd do better with caps with low ESR.

Errr.. no.  ESR is only significant in low-impedance AC circuits, and 
this is a high-impedance DC circuit.  Completely not applicable.

In the DC steady state that is causing Dave problems its the leakage 
current through the electrolytic that gave rise to an undesirable 
voltage drop across the 1M0 pot.

Neil
-- 
www.njohnson.co.uk