[sdiy] I'd like to design a usb or card i/f for patch storeage

Ullrich Peter Peter.Ullrich at kapsch.net
Mon Mar 28 13:16:53 CEST 2011


Hi Colin!

Yes, you are right - that is a difference that could lead to problems - for our projects it was no problem.

Another difference you have to take care of: There is sometimes a minimum cycle time of 120 to 350ns. So that's the time from one data transfer to the next.

But normally - for quite old and slow equipment like instruments - this difference does not matter.

Ciao
Peter

-----Original Message-----
From: synth-diy-bounces at dropmix.xs4all.nl [mailto:synth-diy-bounces at dropmix.xs4all.nl] On Behalf Of Colin f
Sent: Monday, March 28, 2011 11:47 AM
To: 'synthdiy'
Subject: Re: [sdiy] I'd like to design a usb or card i/f for patch storeage

 
> Maybe it is easier and also useful to just design a card that 
> is based on ferroram/MRAM instead of static RAM + battery.
> 
> Ferrorram works like static RAMs but are non volatile!
> 
> I work with RAMTRON and Everspin parts. Both of them work fine.

A word of caution about FRAM - it does not work *exactly* like SRAM.
The FRAM address lines are latched on the falling edge of CE.
You can access different locations on an SRAM by changing the address lines
while leaving chip enabled.
I've used FRAM was to replace the internal SRAM in a TR909, and that needed
the ALE signal patched into the address decoder to make CE behave as
required.

Cheers,
Colin f


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