[sdiy] SSM2164 notes
ASSI
Stromeko at nexgo.de
Thu Mar 10 21:34:34 CET 2011
The locomotive driver strike (no, not the one today) recently had me
stranded for a while, first on a cold platform and then in a non-moving
wagon. As luck would have it, I had the SSM2164 datasheet with me and I've
been using the time to annotate it. Here are my notes, I hope they are
useful to someone.
Control law 33mV/dB = 1V/30dB = 0.2V/octave (positive = attenuation)
That number doesn't click well with the circuit given in the datasheet
(fig.23). The voltage divider on the VC input is clearly labeled as a 9:1
ratio, but that would result in a different control law or a ridiculously
high junction temperature. From the thermal resistance of the package, the
temperature should rise about 5K above ambient at quiescent current only,
but almost 90K would be required to give the same control law with a 9:1
divider ratio (a tenth of VC gets input to the base of the expo transistor).
If the input resistance is indeed 5k as noted in several places, then a more
likely divider ratio would be 10:1 (division of VC by eleven) with a unit
resistance of 450 Ohm (and the "inside" base tie to ground should then be
4500//450=409 Ohm, not the 450 shown). That makes
G = exp( VC / 11VT ) = pow10( VC/0.655V 300K/T )
1/0.655V is the 1.527 factor that has been used in some of the simulation
models discussed before on SDIY.
The control range is -0.66V..3.30V (20dB..-100dB) at RT.
Temperature compensation is accomplished by making VC proportional to
absolute temperature, just like most other expo converters. Running the VC
through a divider with a tempco resistor accomplishes this, but the voltage
should be buffered due to the low input impedance. Staring from the
"canonical" expo circuits the divider ratio needs to be modified to
accomodate the 1/11 scaling inside the 2164 or the buffer needs to have a
gain of 11. Both options can introduce extra errors in compensation if
implemented without care.
It appears that minimum VC feedthrough is achieved with an RB of 470k or
510k at V+=15V, which roughly doubles the bias current to the gain core.
I can't figure out what the diagram in fig.6 is actually showing, the x-axis
is clearly labeled like the frequency-dependant plots, but the legend says
it should be an amplitude... as a side note, the sorry copy&paste job that
CoolAudio passes as their V2164 datasheet not only makes the same error (did
they ever do their own measurements?) and then shifts some (obviously
digitized) plots on the re-drawn coordinate system.
For all the things the data sheet does say, I couldn't find what the maximum
output current actually is. Looking at maximum gain and headroom it appears
to be roughly 5mA, which should add about 15K to the junction temperature
for a single channel at maximum. That allows for all four channels going at
full throttle even at maximum ambient temperature, although I wouldn't think
this is a good idea.
I then set out to find out how the temperature compensation proposed by
Roman Sowa and later rediscovered by Osamu Hoshuyama really works. For that
to be done on paper the strike wasn't long enough even though I finally
figured out the chain rule again and got the basic structure of the TC
correct... :-) As a reminder, the (assumed zero-TC) control voltage is sent
through one channel and is attenuated by some "magical" gain constant (the
control voltage for that is constant and also has zero TC) and then goes
into the control port of a second channel. The resulting equation is easily
differentiated using a symbolic algebra program (I used Maxima...) and
results in a TC of
t:=T/T0
w:=VC/11VT | T=T0 first stage "magical" voltage
v:=VC/11VT | T=T0 exp. CV
TC_G(t) = (1/t - w/t^2) exp( -w/t ) exp( -w exp( -w/t )/t ) v
So, the temperature compensation works exactly only for w=t, the TC is
negative for lower and positive for higher temperatures and then dependent
on the control voltage to boot. Trivially, it is zero at zero CV, but that
isn't all that useful - perhaps if the range of the CV is limited to +-20dB,
shifting the CV to center around 0 could squeeze a bit more precision out of
it. If the point of compensation is set to T=T0=300K, the magical voltage
becomes w0=284mV (which is the value that has been obtained from simulation
as well, as previously discussed at SDIY). Since the TC curve is slightly
asymmetric, the voltage that minimizes the total error across a symmetrical
temperature interval around T0 is at actually at slightly lower voltages:
0.995*w0, 0.98*w0 and 0.92*w0 for 5%, 10% and 20% change in absolute
temperature (+-15K, +-30K, +-60K respectively). Assuming the input is at
1V/octave, the magical attenuation is around e=2.71 and the voltage should
be attenuated by another 1.84 during I-V-conversion.
The error in the temperature compensation is substantial at the end of the
ranges (and, as said before, dependent on the CV itself), but acceptable for
the 5% case. I have an idea on how to improve the compensation by
sacrificing yet another channel on the 2164, but it is trading off
temperature vs. other errors and I'll have to check more carefully if I can
actually win that battle.
Achim.
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