[sdiy] Small MCU MIPS, DMIPS?

[Rainer Buchty]

On Mon, 28 Feb 2011, Scott Gravenhorst wrote:

> I disagree with the premise that it's useless, meaningless or just
> marketing blather.

Sorry, but it *is* meaningless.

Take two CPUs for instance, both showing 100MIPS.

CPU #1 has a CPI of 8, hence to achieve 100MIPS it will need 800MHz.
CPU #2 has a CPI of 1, hence to achieve 100MIPS it requires 100MHz.

Which is better?


Now let's look at the code:

CPU #1 requires for your application 5000 lines of code with an average 
size of 1.5 bytes per instruction.

CPU #2 does the same application in just 20000 lines of code with 4 
bytes per instruction.

Which is now better?


MIPS says nothing. You need to have the reference frequency at which 
these MIPS occur or a CPI value. And then you still have no measurement 
of resulting code size.

Rainer