[sdiy] Modulated ADSR Generator
Matthew Smith
matt at smiffytech.com
Sat Jul 9 12:34:22 CEST 2011
Quoth Stewart Pye at 09/07/11 17:13...
> I'm at about the same stage of development of a similar module. You may
> want to consider using an A4 series XMEGA processor. They are more
> powerful and probably cheaper. 12 ADC inputs and dual 12 bit DAC. Only
> drawback is 3.3 Volt operation. However it's not a bad idea to op amp
> buffer/amplify the DAC output anyway, and your CV inputs can have a
> simple resistive divider and zener clamp.
I was looking at the XMEGAs back when I first started this project, late
last year.
For this application, however, I'm sticking with the "old" Mega128 for a
couple of reasons:
1) This is a "spares box" project - trying to use up some of my stock of
AVRs, as I'm moving, either fully or partially, over to TI MSP430s. Only
costs - other than the DACs which are something I simply don't have here
other than DAC0800s - are the PCBs, which will only be about $20 for a
set of three. (I get my boards made up by Laen
(http://dorkbotpdx.org/wiki/pcb_order) - $5/sq inch for THREE boards,
double-sided, silkscreen, excellent quality.)
2) I've been steering clear of SPI DACs for far too long. Been terrified
of them and the fact that there is often no way to say "load sample NOW"
other than relying on each SPI message taking exactly the same time,
every time. (So messages fired off on interrupts.) Easing myself into it
by using an SPI DAC which *does* have a latch load pin ;-)
As regards 3.3V operation, I'm getting used to it, as a lot of my other
projects have 3.3V-only devices. Especially in the FPGA field (also need
1.2/1.8V) which I'm getting into and for which I fully blame Mr
Gravenhorst ;-)
Think I'll buffer the DAC output anyway, even though it's supposed to be
giving me rail-to-rail output. Might also buffer the inputs.
Cheers
M
--
Matthew Smith
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