[sdiy] Modeling CMOS in SPICE
ASSI
Stromeko at nexgo.de
Wed Jul 6 20:12:58 CEST 2011
On Wednesday 06 July 2011, Harry Bissell wrote:
> Can anyone suggest parameters for a reasonable PMOS and NMOS transistor
> model I could use to create transistor level models of 4000 seriesCMOS
> ICs in LTSpice (or other).
http://cmosedu.com/cmos1/book.htm has a link to 1µm CMOS models. They have
too thin GOx and a lower Vth than the 4000 series, but if you can't find
better models you should be able to reverse-scale (constant field approach)
to 5µm or something like that.
I thought MOSIS had 3µm models, but it seems the oldest technology they
still list is 1.5µm. The models are not directly usable, though - you need
to build them from the parameters listed.
Achim.
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