[sdiy] Modeling CMOS in SPICE

[Harry Bissell]

Hey. you know me, this is NOT OT :^)

Can anyone suggest parameters for a reasonable PMOS and NMOS transistor model I could use
to create transistor level models of 4000 seriesCMOS ICs in LTSpice (or other).

I'm using default MOS models, they work (sort of) but obviously they are not 'strong' enough
to drive actual loads like the 4000 series can.  I'm not using discrete transistors because


obviously the PMOS and NMOS need to be reasonably complementary in order to switch at the same
threshold voltage and prevent absurd shoot-through currents.

(I have some reasonable models using this method for simple gates, now i want flip-flops @

note: logic level models don't work for reasonable analog simulations !

Any ideas appreciated

H^) harry