[sdiy] FPGAs

[Thomas Strathmann]

On 1/27/11 06:11 , Dave Manley wrote:
>> Am I right in thinking that I'd need to learn VHDL, or am I barking up
>> the wrong logic array?
>
> No one needs to learn VHDL.
>
> Learn Verilog instead.

I like Verilog better myself (because I'm from the C side of town so to 
speak), but VHDL is not bad either (if I were to use it I might learn to 
like it). One should probably try to read a few examples of the same 
functionality implemented in Verilog and VHDL and compare them side by 
side. Also take into consideration what your tools support, for which 
language you get more and better books (from your local library), 
whether you get more free source code for one or the other and so on.

BTW, does the rule of thumb that VHDL dominates in Europe whereas 
Verilog is predominant in America (and maybe other parts of the world) 
still hold?

	Thomas