[sdiy] Multiple LCD connection sanity check please

[Richie Burnett]

Hi Tom,

What you propose should work fine in theory.  You tie all of the data lines to
one common 8-bit bus.  Pull all of the Read/Write permanently into the write
state, and have a seperate Enable line to act like a "chip select" for each LCD.
 You write data onto the 8-bit LCD bus, set the common R/S line appropriately,
then toggle only the enable line appropriate for the screen you want to write
to.  Observing data setup, hold, and enable toggle times etc.

The only problem that you might see with this type of arrangement in practice is
one of signal edge reflections.  A modern relatively fast CPU like the dsPIC is
capable of slewing it's output lines from 5 volt to zero (or the converse) in a
few nanoseconds.  If you have a lot of long wiring connected to this, the fast
edge will travel down to the end of the ribbon cable or whatever and then
reflect back.  The problem is caused by a mismatch between the characteristic
impedance of the cable and the load at the end at radio frequencies.

I have actually experienced this several times with a commercial product I'm
working on (not audio related).  So it is not a theoretical problem it is very
real and very troublesome when it happens!  The signal reflection usually either
results in the enable line double clocking the LCD - Sometimes producing a
duplicate character but more often than not producing a corrupted screen due to
the unwanted second write following the first with insufficient time in between.

The problem is not one of trying to write to the LCD quickly,  it is one of the
slew rate on the data lines being too rapid for the poor end termination.  So
slowing down the writes to the LCD actually doesn't help.  Back in the day when
the HD44780 was invented CPU's were a lot slower and therefore they didn't need
to slew their data lines anywhere near as fast as they do now.  Slower rise and
falls put a lot less high frequency energy into the cable and you don't get
horrible high-frequency reflections and double endges at the LCD end of the
cable.

The main thing that helps with this is too keep the cable between the CPU and
the LCD as short as you possibly can.  In my example 6" worked, 10" was iffy,
and 16" failed catastrohpically with a dsPIC running at 2MHz on one end and a
selection of different LCD's tried at the other!

Some HD44780 LCDs are a lot more robust to this than others.  Real HD44780's
don't seem to see a lot of the signal reflection stuff and are quite robust,
likely because they are still made using an old slow CMOS process.  Some modern
HD44780 compliant LCDs a much faster at responding.  This combined with lower
logic thresholds required for 3.3V compliance only makes the problem worse!

Along with keeping the wiring to the minimum length, it is wise to provide pads
on the PCB for putting end termination resistors at the driving end.  This is
the textbook way of taming the signal reflections and worked great for our
product.  22R to 100R should be in the right ballpark.  You can think of this
series resistance at the driving end forming an RC filter with the cable
capacitance and slowing down the otherwise lightning fast edges that would
reflect back from the end of the cable.

My appologies for this quite long post, but if it saves others the weeks of
troubleshooting that it can take to debug this sort of problem, then it was
worth my time to write it and yours to read!

Best regards,

-Richie,