[sdiy] Digital Noise, FYI

[Matthew Smith]

Quoth Scott Gravenhorst at 16/02/11 23:12...
...
> For anyone interested, here is a table of taps for maximal length LFSR pseudorandom number
> generation (or noise):
> 
> http://home1.gte.net/res0658s/electronics/LFSRtaps.html

Very handy since the TTL Cookbook only lists up to 31 stages.

For the record, the Xilinx XC9536 hits 36 used/36 macrocells available 
at (guess what) 36 stages. I make that 68,719,476,735 steps before 
repeat. Fair old time between repetitions, even at 1MHz. (The ADC has a 
settling time of 1us - not a lot of point clocking faster than this.)

-- 
Matthew Smith

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