[sdiy] Digital Noise, FYI

Matthew Smith matt at smiffytech.com
Thu Feb 17 21:55:09 CET 2011


Quoth Scott Gravenhorst at 16/02/11 23:16...
...
> The list includes LFSR lengths from 3 bits to 168 bits.  The more taps, the better.  I
> typically use 64.

The CPLD I'll be using won't be performing any other functions - I think 
I'll just keep adding stages until the ISE software tells me I've run 
out of resources!

I'm guessing that I'd feed my 12-bit DAC from the lower 12 stages - is 
there a better point or is this OK?

Will probably have my clock range from about 1kHz to 1MHz - upper end 
for noises, lower end for Weird Noise :-)

-- 
Matthew Smith

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