[sdiy] Digital ADSR - perceivable staircase?

Matthew Smith matt at smiffytech.com
Tue Feb 15 21:34:23 CET 2011


Thanks to all for the replies!

Quoth David G. Dixon at 16/02/11 03:24...
...
> Also, wouldn't an integrator on the output smooth the steps by converting
> the output from a (discontinous) staircase to a (piecewise-continuous)
> series of connected lines?*

My first thought was to have a capacitor across the output by way of a 
filter *if* any issues were to occur.

If improving the (voltage) resolution of the DAC will remove the need 
for post-filtering, then I might just bump the whole thing up to 16 bit 
and have done with it. Might even use a discrete R-2R ladder driven 
directly from the microcontroller for the DAC. (Partly because I want a 
home-brew one in there *somewhere*.)

Should have stated the purpose: VCA envelope, VCF envelope. No 
oscillators will be harmed by this subsystem. (Keeping my design simple, 
there are no VCOs in there. Initial wave comes from the wavetable DCO 
(256 samples per cycle,) LFO will only provide modulation to VCA, VCF 
and will likewise be a DCO, but with a much longer wavetable (1024 or 
even 2048 samples per cycle.)

-- 
Matthew Smith

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