[sdiy] Digital ADSR - perceivable staircase?

[David G. Dixon]

> If we consider a digitally-generated attack signal as a staircase, at
> what 'width' of step - in other words the time between increments in
> level - would the increase in volume of the system output become
> noticeable?
> 
> So as to have something to go on, I am considering a maximum A/D/R time
> of 2 seconds so, at maximum time, a 'step' would be about 8ms long,
> based on 256 levels x 256 steps.
> 
> Really wondering what my maximum time can be before the 256 steps become
> obvious.

Wouldn't it be advisable to use an expo converter after the DAC?  That way,
you have much more flexibility regarding the longest envelopes, and even
very short envelopes would use several voltage steps from the DAC.  This
would also address the problem of negative DAC output offset, if it exists.
Also, wouldn't an integrator on the output smooth the steps by converting
the output from a (discontinous) staircase to a (piecewise-continuous)
series of connected lines?*

*Or am I smoking crack?