[sdiy] Digital ADSR - perceivable staircase?

[Scott Gravenhorst]

I would think that both step size and step time can influence sound under some conditions
(but not all).  Step amplitude size can make a difference when the time between steps is
long and might be perceived as a series of clicks (if used with a VCA) where shorter times
then could produce the zipper villain.  Step time being longer could (as mentioned by
someone else) be perceived as descrete pitches (if VCO) or discrete timbre changes (if
waveshaper) - this would be aggravated by larger amplitude steps due to lack of amplitude
resolution.

In general I've found that it is best to use the maximum resolution one can.  Smaller
steps that are closer together would seem to me to "follow" a curve better.  My own FPGA
ADSR designs are around 28 bits wide and run at my sample rate (100KHz or more).  They are
quite audible artifact free.

>----- Original Message ----- 
>From: "Matthew Smith" <matt at smiffytech.com>
>To: "Synth DIY" <synth-diy at dropmix.xs4all.nl>
>Sent: Tuesday, February 15, 2011 12:12 AM
>Subject: [sdiy] Digital ADSR - perceivable staircase?
>
>
>> If we consider a digitally-generated attack signal as a staircase, at what 
>> 'width' of step - in other words the time between increments in level - 
>> would the increase in volume of the system output become noticeable?
>>
>> So as to have something to go on, I am considering a maximum A/D/R time of 
>> 2 seconds so, at maximum time, a 'step' would be about 8ms long, based on 
>> 256 levels x 256 steps.
>>
>> Really wondering what my maximum time can be before the 256 steps become 
>> obvious.
>>
>>
>> -- 
>> Matthew Smith
>>
>> Blog: www.smiffysplace.com  Business: www.smiffytech.com
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-- ScottG
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-- Scott Gravenhorst
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