[sdiy] 4006 on evilBay

[Richie Burnett]

> BUT - you won't get the CMOS voltage range with either a microcontroller
> or a CPLD without level translation.

I don't know what the clocking rate is for a typical 15V 4006 PRBS noise 
generator, but you might be able to get the same noise power in the audible 
spectrum with a 5V supply just by slowing down the clock speed 
appropriately.  Slowing the clock rate down essentially spreads the same 
amount of noise more thickly over a smaller bandwidth.  You just need to 
make sure you don't slow the clock speed down too far or else you get 
dulling of the HF and eventually audible colouration (comb filtering) from 
the sampling process. (It's starts to sound like space invader zaps & 
explosions.)  Fs=80kHz gives less than 1dB of droop at 20kHz so is a good 
lower limit for clocking speed.

Conversely increasing the PRBS clocking speed spreads the available noise 
more thinly over a wider frequency range, so makes the audible content sound 
quieter.

-Richie,