[sdiy] Voltage-limiting a comparator output.

[Dave Kendall]

Hi all.

I'm working on a circuit that aims to accept a gate anywhere between 
±15V, and convert it to a positive voltage between 0V and +5V, for 
driving logic circuits.
The first bit seems simple enough - an op-amp based comparator, 
followed by a series diode to give half-wave rectification.
Then I had thought of feeding the comparator's output into a simple 
voltage divider, to bring the output down to +5V.
The other option would be to use a 4.7V or  5.1V zener. I'm unfamiliar 
with using zeners, and the drawback of the first solution is that using 
±12V or ±15V will affect the divided voltage. It would be nice to have 
the thing equally happy with either ±12V or ±15V power rail voltages, 
without swapping out resistors if changing between the two.

Are there any drawbacks to setting the voltage divider to kick out say 
7V at ±15V (which would be a bit over 5V ±12V), and then have a zener 
limit the output to  +5.1V or 4.7V? How robust is a zener? - I guess if 
it failed, the next IC in line is toast.

Probably a really basic question, but maybe there's a well-known, 
proven scheme already out there....

Any suggestions welcome.

cheers,
Dave