[sdiy] Quad wavetable osc

[Tom Wiltshire]

On 16 Aug 2011, at 00:19, karl dalen wrote:

> Great stuff as usually Tom! 
> How much computing power do you have left in the 802? 
> 
> KD

A fair bit, actually. 80% of the time is still free.

The samples are generated in blocks of 16 for output at 89KHz. The DMA controller deals with transferring samples from the audio buffers to the DAC, so that doesn't load the processor. This means I only have to generate a new block of samples at 5.5KHz (89/16). Currently the sample generation takes 36.5usecs out of a possible 179usecs - hence 20%. I'm very pleased with this, since I've been able to make best use of the DSP features (which I haven't really done before) and they really increase the power of the chip. Unfortunately not all algorithms are as amenable to "DSPification" as others. I've struggled with my modulation generators, for example, since they include a lot of branching, and are essentially different algorithms for different purposes.

But I'm sure I'll need the extra time. Before this is useful, there's a load more stuff to go in...

T.