[sdiy] Guard Rings

[David G. Dixon]

Here is my "expert" opinion (if I'm smokin' crack, I'm sure I'll be
corrected in short order by a real "guru"):

The high impedance sections are the traces connecting the sources of Q11 and
Q12 to the gates of Q7 and Q8, across capacitors C5 and C6.  The guard rings
should be put around these traces, and ONLY these traces.

The junctions between the emitters of Q5 and Q6, resistors R16 and R18, and
the drains of Q11 and Q12, respectively, are emphatically NOT high
impedance.  In fact, their impedances are about 2.2k.  (Compare this to the
~1,000,000,000k impedances of the JFET gates.)  The guard rings should not
surround these junctions, as these constitute an unprotected low-impedance
leakage path.  The whole point of guard rings is to prevent surface leakage
from the high-impedance traces by surrounding them with a low-impedance
voltage source at the same voltage.  Including these variable-voltage
junctions inside the guard ring is akin to including the fox inside the
chicken coop!

Hence, referring the layout, I would re-route the guard ring so that it
loops around just the source pad of Q11, and does not extend around the
gate/R23 junction, nor around the drain/R16/Q5-emitter junction.  In order
to do this, you should straighten out the trace to the gate of Q11 so that
it runs perpendicular to the pins of Q11.

The source of Q7 and the base of Q9 are not part of the high-impedance
network either.  Bipolar transistors have measurable base current flow
(which the source of Q7 drives in this case).  There won't be much current
flowing into the base of Q9, but the extremely close proximity of these two
traces looks like another potential source of leakage to me.

Hence, referring again to the layout, I would separate those two blue traces
between R13/Q7-gate and Q9-base/Q7-source, and reroute the guard ring
between these traces.

Hope this helps!


> I have a question. I am laying out the Dual Sample & Hold/Random Voltage
> module schematic here:
> 
> http://www.xmission.com/~dingebre/SP_Samp_Hold_1.0.pdf
> 
> A current PCB layout closeup showing the guard ring such as it is, is
> here:
> 
> http://www.xmission.com/~dingebre/PCB_part.jpg
> 
> In conversations with Nyle, he recommends putting a guard ring around the
> high impedance sections and tying it to the output of the voltage
> follower,
> but I'm struggling trying to figure out what these are.
>
> I've decided it should include the nodes/pads which connect to the two
> FETs
> including a couple of resistor pads and the one capacitor pad.
> 
> The ring shows as a red line tracing close to the pads of the FETs, cap,
> resistor, etc. The guard ring is a trace on both sides of the PCB. It
> starts
> and ends on the emitter of the voltage follower which (I think) is Q9. I
> excluded any pads going to ground or power.
> 
> First question, is this correct? I put a dashed line around the pads I'm
> including in the ring on the schematic.
> 
> Second, I've read somewhat about guard rings but would love a link to
> other
> information so I can understand this so I make an intelligent PCB.
> 
> Thanks everyone.
> 
> David
> 
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