[sdiy] FPAA for analog synthesis?

[ASSI]

On Wednesday 03 March 2010, Dave Manley wrote:
> Assuming I understand what you're asking, the array underlying a
> CEM design is general purpose device.  It contains a number of
> transistors, resistors and capacitors, that can be hooked
> together.

There are no capacitors (save the parasitic ones) in the CEM arrays 
and they are different from the Array700 series.  More info on my 
website:

http://Synth.Stromeko.net/DIY.html#CEMpics

There is just a single level of wiring that can be mask programmed and 
it can be gleaned how painful this must have been at times by just 
following the traces.


Back to the FPAA topic or what I still care to remember about it, I've 
been doing some research on that quite some years ago:

There was a switched capacitor array by Motorola, which may have been 
the first to use the moniker FPAA.  The technology was originally from 
Pilkington, then went on to Moto and ended up with Anadyne which then 
got renamed Anadigm.  So that's that lineage to the more specialized 
chips you can still get today.  

There was another company called IMP that was doing more or less the 
same thing (switched capacitor) and calling it EPAC, you could even 
buy those for a while.

Then there's TRAC by Zetex, now Diodes.  There's nothing on their 
website save a press release from 2000, get the lore from the 
datasheet archive or the wayback machine.  Some parts are still active 
but non-stock from Digikey.  It's continous time, you can configure 
the type of circuit and a few connections.  I almost got a DevKit for 
research, but then they pulled out of the "free for application note" 
deal and that was the end of it with me not having a budget.

The only thing I've ever seen that would have been suitable for 
voltage controlled synth stuff was a research project by Fraunhofer 
IMS, because it was multiplier based.  they called it analog silicon 
breadboard or FPAD.  We were trying to use it in teaching, but the 
interest of our Prof cooled off considerably after hearing the price, 
negotiations to lower it simply went nowhere and we ended up not 
buying when we couldn't even get a demo of a working system.

Lattice isPAC went dead, too - unless you count the (again) more 
specialized power management solution they distilled from it.  The 
general idea lives on in Cypress' PSoC combined with a uC.  Another 
novel tack that PSoC introduced is to offer both continous and 
discrete time blocks.  Lastly, Actel Fusion  combines some analog IO 
with a Flash FPGA and Smart Fusion adds a Cortex M3.


Achim.
-- 
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SD adaptation for Waldorf microQ V2.22R2:
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