[sdiy] Saw core JFET mystery

[David G. Dixon]

> What is your voltage discharge swing?

5V ramp, 1nF cap, PN4391 JFET (rated at 30 ohms on-resistance).  The
discharge time should be on the order of 150 to 200ns, if I'm not mistaken).

The reset circuit is simplicity itself: JFET gate wired directly to
comparator output, 680-ohm Franco resistor (based on simulations, which are
obviously crap), 1k timing resistor, 22pF timing cap, 2.2k comparator
pullup.  That's it.

I forgot to mention the major part of the mystery.  The thing which is
really causing me confusion is that if the reset timing resistor is too
large (i.e., significantly larger than 1k), the integrator output swings
well below 0V during reset.  Simulations suggest that it should simply ride
at 0V until the comparator switches off, but it can swing as low as -2 or
-3V, and it is more severe at higher frequencies.  If anyone has an answer
to this, I'd love to hear it.  (I'm guessing it has something to do with the
Franco resistor...?)