[sdiy] saw core JFET mystery
cheater cheater
cheater00 at gmail.com
Mon Mar 1 13:41:30 CET 2010
Ah, OK. I was suprised because David mentioned he used a time 10x
smaller than he normally saw in circuits.
Would another FET model be better with regards to the current it can work with?
D.
On Mon, Mar 1, 2010 at 13:21, <jhaible at debitel.net> wrote:
> No, larger time constants in the circuit than it would be necessary with an
> optimal (high current) FET, to provide enough time for a FET with lower current
> to fully discharge the integration cap.
>
> JH.
>
>> BTW, I think you mean smaller time constants :-)
>>
>> Thanks
>> D.
>>
>> On Mon, Mar 1, 2010 at 10:55, <jhaible at debitel.net> wrote:
>> >
>> >> Jürgen,
>> >> Are you saying that it might be better to use something else instead
>> >> of the jfet?
>> >
>> > No - just explaining why you might find larger time constants than
>> "neccessary"
>> > in the usual designs.
>> >
>> > JH.
>> >
>> > -------------------------------------------------
>> > debitel.net Webmail
>> >
>>
>>
>
>
>
>
> -------------------------------------------------
> debitel.net Webmail
>
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