[sdiy] Does Source = Drain???
Antti Huovilainen
ajhuovil at cc.hut.fi
Sun Jun 13 11:54:34 CEST 2010
On Sun, 13 Jun 2010, David G. Dixon wrote:
> Every datasheet I've ever read on JFETs always says that the source and
> drain are interchangeable, right on the front page. I don't think it
> matters. I'd say, orient them for maximum layout convenience.
Does this hold even for parasitic components?
Antti
"No boom today. Boom tomorrow. There's always a boom tomorrow"
-- Lt. Cmdr. Ivanova
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