[sdiy] zener limiting of filter self-oscillation

[David G. Dixon]

Thanks, Dave (and Paul for your private reply) on this matter.  I've given
up on the transistors-as-zeners approach.  If I can't simulate it, I won't
bother with it, and I'm too lazy (not to mention, incompetent) to rewrite
the SPICE model.  Here's what I've decided to do.

Based on simulation, a trimpot in series with the zeners will work well.
However, contrary to Jung, the pot need not be connected to ground.  Wiring
it as a variable resistor in series with the zeners will do.  Also, 5k is
way too large.  The actual range of resistance which varies the clipping
level from that of the zener to that of the opamp (about +/-13.5V) is only
about 250 ohms or just a little more, regardless of the zener breakdown
voltage.  Hence, I will use either a 500-ohm trimpot with a 560-ohm resistor
across it, or else a 1k panel pot with a 360-ohm resistor across it
(probably the latter).  According to simulation, this will give a linear
transition from zener level to opamp level.  (Of course, this may change
given that the SPICE simulation of the zeners may not be all that realistic,
but then I can just find the correct resistances by experiment.)  I will use
5.6V zeners, either 1N752 or 1N4734.  This will give a minimum sine
amplitude of just under +/-5V.

Interestingly, simulation also suggests that sine waves from the first
filter stage (i.e., the dirtiest, least filtered ones) at the maximum
amplitude (i.e., clipped by the opamp) only have about 0.2% THD, but
clipping at any voltage with the zeners increases the distortion to about
0.6% THD.  This is the same level of distortion one would expect from a
differential-pair sine shaper.  Of course, if I tweak the resonance such
that no clipping is needed, then the sine waves are perfect, but it is not
so easy to achieve stable sine waves this way, particularly when the cutoff
frequency of the filter is changing (e.g., when the filter is being played).

My design is now complete.  I can't wait to build this filter!


> David G. Dixon wrote:
> >
> > Also, Jung's IC Opamp Cookbook (1st ed., 1974, Fig. 5-20, pg. 203) shows
> how
> > to use two PNP transistors (2N3906) with their bases and collectors
> > connected together instead of zeners, suggesting that these will clip at
> > about +/-7V.  However, simulation in Multisim shows no effect
> whatsoever.
> > So, has anyone tried this, and does it actually work?
> 
> I'm guessing this is because spice models for transistors don't model
> the reverse characteristic needed.  I think David Ingebretsen ran into a
> similar problem while trying to simulate some Synthacon modules.  At
> that time I looked at the available parameters in the spice model, and I
> don't recall there being anything there to support this mode of
> operation.  Maybe would be worth a look at the Multisim library model
> documentation.