[sdiy] Analog division

Tim Daugard daugard at cox.net
Mon Jul 19 21:25:34 CEST 2010


From: "cheater cheater" <cheater00 at gmail.com>
you can only take logarithms of positive numbers, so it wouldn't work
without modifications. However you can rectify each signal and extract
the sign with a comparator, then multiply them with e.g. an AND gate,
and apply that to the output. Then you should be fine, I think.

This module:

http://members.cox.net/synthfred/h_alg121.htm

provides a signal that is the log of the signal centered on the reference 
voltage at the top of C7. If you look at the description, it takes the log 
of both the positive and the negative going portion of the signal. The 
waveforms from the theory section match the waveforms from the built module.

The math would be:

 ref+(log(sig-ref)) -->  if the signal is greater than the ref

 OR

ref-(log(ref-sig)) --> if the signal is less than the ref.

I'm not positive I got the math right but, the figures are 100% verfified.

Tim Daugard
AG4GZ 30.4078N 86.6227W Alt: 12 feet above MSL
http://members.cox.net/synthfred/h_toctop.htm (Fred's online edition)





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