[sdiy] Analog division

Olivier Gillet ol.gillet at gmail.com
Mon Jul 19 20:55:04 CEST 2010


On Mon, Jul 19, 2010 at 8:35 PM, cheater cheater <cheater00 at gmail.com> wrote:
> Olivier,
> you can only take logarithms of positive numbers, so it wouldn't work
> without modifications. However you can rectify each signal and extract
> the sign with a comparator, then multiply them with e.g. an AND gate,
> and apply that to the output. Then you should be fine, I think.

That's why I said making it work on 4Q will be the tricky part :)

The output sign is the xor of the sign bits.



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