[sdiy] Analog division

[cheater cheater]

Olivier,
you can only take logarithms of positive numbers, so it wouldn't work
without modifications. However you can rectify each signal and extract
the sign with a comparator, then multiply them with e.g. an AND gate,
and apply that to the output. Then you should be fine, I think.

Cheers,
D.

On Mon, Jul 19, 2010 at 20:13, Olivier Gillet <ol.gillet at gmail.com> wrote:
> This is also what I was thinking about... If you look at the upper
> part of the schematics in the Mike Irwin article, you'll see that one
> of the nodes of the circuit outputs a voltage proportional to log(V_in
> / Vcc).
>
> Using exp ( log a - log b ) = a / b, maybe it would be worth trying
> using two servo VCA+Op-amp cells like that, one of them into an
> inverter, then a summer the result into the CV input (or are the CV
> input of the SSM2164 summing nodes?)  of another SSM2164 with a
> constant input - this VCA playing this time the role of an exponential
> current source. And a final op-amp to convert the output current into
> a voltage.
>
> Would this work on four quadrants? Probably not, that's the tricky part!
>
> Straightforward, random, and probably wrong idea :D
>
> On Mon, Jul 19, 2010 at 7:50 PM, David G. Dixon
> <dixon at interchange.ubc.ca> wrote:
>>> I'm thinking of the SSM2164 as well... it looks like it could go
>>> in an opamp feedback loop.
>>
>> That's how we "linearize" it, actually.
>>
>> I've used two linearized 2164 VCAs (which means all four VCAs on the chip)
>> to make a very nice four-quadrant multiplier.  It's very straightforward.
>> I'm not sure about division -- never given it much thought I'm afraid.
>>
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