[sdiy] SSM2164 stability

[Olivier Gillet]

It all started with this page:
http://www.charlielamm.com/synth/duallinearvca.php
"What is going on with the 500pF caps and 500ohm resistors at the input?"

Where I found the mention to a low-pass at 10kHz. -3dB at 10kHz would
be quite noticeable especially with 4 cells like that chained. But I
don't think this value is correct - transfer would indeed be (500 +
1/Cp) / (30500 + 1/Cp) only if the input was a high-impedance, voltage
input, and if we actually cared about voltages. Which is not the case
here.

To this purpose, it would be nice to know how the actual input current
relates to V_in when taking into account this network - to find less
exotic substitution values... I'm sure we can be more aggressive with
the attenuation without entering the audio range... But I have doubts
as to what's going on exactly internally at the input pin. For those
who run simulations, do you see the change in the attenuation / phase
shift in the high frequencies when you tweak those values?