[sdiy] triangle hard sync

[Paul Perry]

The easy way to a trigger plus stretched gate might be a 555.
But, as you say, designing with transistors is indeed instructive.
Look at the MS20 VCA, for example.

paul perry Melbourne Australia

----- Original Message ----- 
From: "David G. Dixon"
> Of course, a diode on the pulse to the comparator (-) input was exactly 
> what
> was needed to eliminate the negative spikes, along with some well chosen
> resistor values.
>
> However, in order for the integrator to reset reliably (particularly when 
> a
> large cap is switched in for long LFO times), I had to design a pulse
> stretcher circuit.  This was an interesting exercise, since the trigger
> signal to the JFET gate must ride at -15 until it switches, and then go to
> ground (or thereabouts) for a finite time (about 3ms to reliably discharge 
> a
> 10uF cap with a 2N4391).  To obtain this trigger shape requires two
> transistors -- an NPN to invert the sync signal (so it fires on the rising
> edge), and a PNP to convert this inverted signal to the trigger.  The base
> resistor on the PNP then determines the trigger time.  All in all, this 
> was
> not a trivial exercise, and will add significant complexity to the LFO
> circuit (which is a triple unit), but I think it should be worth it to be
> able to sync the LFOs to a keyboard gate.  It should work exactly like the
> Oakley LFO (except that the triangle will rise after reset).  Plus, it
> forced me to design with bipolar transistors, which is always instructive.
>
> I decided not to try to reset the triangle to -15V or +15V, as this 
> involves
> injecting current through the JFET, which is tricky, and cannot be done
> quickly enough if the integrator cap exceeds a certain size.  I can live
> without it.
>