[sdiy] DSI Mopho analysis: Oscillator Slop, sub osc, etc

Dave Manley dlmanley at sonic.net
Mon Jan 18 08:58:13 CET 2010


I bought a Mopho, and started scoping out a few simple internal signals 
tonight.  I decided to look at the oscillator slop parameter.  The UI 
allows a value of from 0 to 5.  Before looking at it with the scope, I 
expected the slop setting to slowly vary the reset time of the ramp 
integrators on the PA397.  I was a little surprised to see that the 
reset time is changed about every ~3 seconds.  For freq=261Hz, the reset 
time changes in quantized steps of ~900nS.  I set freq=523, and the 
steps are quantized ~500nS.

The reset time changes randomly.  Watching it for a while with slop=5, 
iit had this characteristic:

0,-1,-2,-1,-2,-3,-4,-5,-4,-3,-2,-3,-1,0,+1,+3,+2,-1,+1,0,+1,+2,+3,+2,+3,+4

Where the numbers = number of quantized steps.  I'll do a more thorough 
check on step size vs frequency later.

The sub osc is a simple divide by two of the integrator reset pulse.  
The pulse is used as the clock into a 74HC74 DFF.

I'll post more results as I have time.  If anyone has specific questions 
let me know.

I plan on walking around the dsPIC, and the PA397 on a pin by pin basis 
to see what they are doing.

Eventually, an annotated pic of the pcb, a detailed block diagram, scope 
captures, and/or perhaps some schematics of sub-circuits.  The layout 
looks well organized and straight forward to trace.  Of course, one of 
the items of interest is the previously discussed weird behavior when 
switching from a high frequency to a lower one.

I'll also post a list of the ICs in use, there's not any big surprises.

-Dave





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