[sdiy] CGS Analog Logic queries

David G. Dixon dixon at interchange.ubc.ca
Mon Jan 11 23:06:52 CET 2010


Hey Team,

I'm just in the process of adapting a couple of Ken Stone CGS circuits for
my own format/layout, etc.  I've just completed laying out a version of the
Analog Shift Register which uses an LF444 for the sample-and-holds, and I'm
planning on prototyping that next week (email if interested).  I can think
of all sorts of uses for this baby, and I'm considering adding gate and
trigger outputs to the three CV outputs.

Also, I'm intrigued by the Analog Logic module.  It essentially provides a
three-input analog AND/NAND gate (which outputs the minimum of the three
inputs, and its inversion) and a three-input analog OR/NOR gate (which
outputs the maximum of the three inputs, and its inversion).

I've got a couple of questions for anyone who might have built this circuit:

1.  In my simulations, I replaced the +10V and -10V inputs with +15V and
-15V (the rails), and changed the 100k input resistors on these fixed
voltages to 10M.  The first part has the effect of eliminating the
transistor circuits which source the +/-10V (which I couldn't see much need
for) and the second part ensures that the output signals are faithful
reproductions of the input maxima/minima.  With the 100k resistors, the
output signals were attenuated.  My question is this:  Is this OK, or am I
ignoring some booby trap here?

2.  My other question is:  What do you use this thing for?




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