[sdiy] exponential vs linear vco cores

[cheater cheater]

Jays and David,
sorry to hijack your SSM2164 thread :P but I have a follow up question
to the topic of I/V stage designs.

Is the exponentialization always integrated with I/V or does it
sometimes happen purely in the voltage domain or alternatively purely
in the current domain?

Aaron,
thanks a lot for the link. I can't have a look right now being on
GPRS, but as soon as I have some sort of useful internet connection
I'll make sure to dig up the link.

Cheers
D.

On Fri, Feb 26, 2010 at 21:06,  <jays at aracnet.com> wrote:
> David,
>
> Several quesions if you don't mind. Thanks!
>
> If I remember right you need to get a magic voltage good to 3 digits (down to mV) for your expo to work right.
>
> Is this voltage used for the expo converter or the temp comp for the expo converter?
>
> How hard is it to get that tweaked in for proper operation with cheap test equipment (in this case for me cheap means < $50 DVM)?
>
> Thanks
> Jay S.
>
> David G. Dixon wrote:
>
>>
>> > Tempco class discussion based on Rene's website, with a side note that if
>> > you really want to go down the rabbit hole, you should check out Ian
>> > Fritz's website.
>>
>> Didn't want to go down the hole, or even near the hole.  That's why the
>> 2164-based approach was so appealing to me.  No gluing of expensive and hard
>> to find parts (tempcos) to other expensive and hard to find parts
>> (super-matched pairs)!
>>
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