[sdiy] RE: [AH] Parametric EQ

Neil Johnson neil.johnson97 at ntlworld.com
Sun Feb 21 14:29:49 CET 2010


Hi,

Tom Wiltshire wrote:
> What did you do about the resonance response of the SSM2164? I  
> found that getting a reasonably constant resonance out of it w.r.t  
> cutoff was quite difficult. Did you bother with any compensation?  
> In the end, I think I decided I didn't care that much (it sounded  
> so *fat* and *good* anyway...yuummmm!) and I've just got a couple  
> of back-to-back 4V7 zeners on the LPF output amp. This isn't shown  
> on this earlier circuit diagram, but they're on IC2.2, in parallel  
> with C4.
>
> http://www.electricdruid.com/VCResonator.jpg

Trouble with that arrangement is that it relies on zeners being  
perfect diodes, i.e. no current for V below 4V7 (in this case).   
However, there _is_ current flow, albeit tiny compared to the 'on'  
current, so at low frequencies, where the current flowing into/out of  
the SSM2164 gain cell is equally tiny you end up with a DC current  
path in parallel with the integrator capacitor.

The solution I used in my 3-pole filter is to configure the zeners as  
the bottom leg of a potential divider from the output of the LP  
integrator back to the input.  See here:

http://www.milton.arachsys.com/nj71/pdf/cesyg/vcf-sch.pdf

In this case focus on IC3A, with R10 and D1,D2 form the potential  
divider.  This keeps the main signal current path clean.

Worked for me at any rate.  The funkiness around IC6B tames the  
filter at high resonance settings, at least up to around 16kHz or  
so.  After that it starts to misbehave again.

Neil
--
http://www.njohnson.co.uk






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