[sdiy] SRAM question

[Scott Nordlund]

Another option is PSRAM (pseudo-SRAM).  This is DRAM that has its own 
internal refresh circuit, and uses almost exactly the same external 
interface as SRAM.  I think the only difference is that the timing has
to accommodate the refresh cycle.  Since it can retain its contents 
with no external control, it's also a candidate for battery backed
RAM.  It's cheaper, but slower and has higher power consumption.  
It was used in the Kurzweil K2000 series for battery backed user RAM,
which is why those machines have 3 AA batteries rather than a lithium
coin cell.

It's becoming obsolete these days, but so is SRAM, at least as far as
parallel interface, 5V, through-hole stuff goes.

----------------------------------------
> From: colin at colinfraser.com
> To: synth-diy at dropmix.xs4all.nl
> Subject: RE: [sdiy] SRAM question
> Date: Fri, 19 Feb 2010 18:19:58 +0000
>
>
>> Sometimes there is additional protection circuitry to prevent
>> the processor from accidentally writing to RAM during power
>> up/down when it might do unpredictable things.
>
> There should always be protection circuitry.
> You need to detect power-down as soon as it happens and deselect the RAM
> chip before any spurious writes can occur.
> This can often be done by the circuitry that holds the CPU in reset when the
> supply voltage is too low.
> Deselecting a low power SRAM chip will usually put it into its standby power
> mode, with all outputs in high-impedance state.
> Remember you need to keep the device deselected once power in the rest of
> the circuit is down.
> So if the RAM chip only has active low chip enable lines, these are going to
> need pulled high by the battery voltage when the rest of the circuit is off.
> 6264 SRAMs used to have an active high chip select line that made life
> easier...
>
>> While this was pretty common 10-20 years ago, these days more
>> often you'll find long-term storage is done with flash memory
>> or EEPROM which needs no battery to retain its data.
>
> The problem with flash or EPROM is the endurance of data.
> If you have frequently changing data in memory that you want to be
> non-volatile without having to initiate an explicit store operation before
> power-down, then battery backed SRAM is the answer.
> One possible alternative to save the cost of the battery and power
> switchover circuitry is FRAM.
> But don't believe their hype about it being a drop-in replacement for SRAM -
> it needs the CE line toggled to latch every new address in.
>
> Cheers,
> Colin f
>
>
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