[sdiy] self-modifying code was: Re: My latest project

[Rainer Buchty]

On Thu, 18 Feb 2010, cheater cheater wrote:

> "because auf zhe place und raute effort I dont knov whezzer".. ;-)

There you see how speaking two languages messes up the language 
processor.

Btw, you wouldn't use "auf" here in German, but pronounced English it 
matches the sound of "of". So much for that ;)

> Seriously though: the FPGA is great because you can reconfigure it
> when you need.. It would be nice to be able to have that need more
> often than once per boot. You could even think of a reduced
> instruction set CPU which sets up pipelines for additional
> instructions as and when they are needed - substantially removing the
> die size needed, while still giving you the whole range of
> capabilities..

Welcome to part of my research -- Self-X architectures ;)

But dynamical P&R is out of the question, you certainly don't want to do 
that with average FPGAs.

Some time ago there was a research project (cf. Warp Processor) which 
used a dedicated architecture (2 ARM cores and a restricted FPGA logic) 
for dynamic architecture alteration (loop support, block synthesis). 
Here, the FPGA was quite stripped down so that a (40MHz IIRC) ARM core 
is able to perform P&R within a matter of seconds.

Rainer