[sdiy] self-modifying code was: Re: My latest project

[Eric Brombaugh]

It's worth noting for those who haven't done this themselves that 
building an FPGA bitstream takes a fair amount of horsepower and 
proprietary tools. Synthesizing a new design (the equivalent of 
compiling code) for one of my day-job projects takes in excess of 3 
hours on a 3GHz x86_64 system. So, no, the FPGA can't come up with the 
bitstream on its own. The general idea with partial reconfiguration is 
that the processor in the FPGA (or an external processor) can select 
from a number of pre-built designs and swap them in at run-time.

While it's conceivable that you could tweak individual circuit elements 
within an FPGA bitstream in a live system (equivalent to modifying 
individual opcodes in an assembled program), the FPGA vendors don't 
publish the mapping of bitstream bits to circuit elements - that's all 
hidden by the synthesis tools. If you wanted to do that you'd have to 
reverse-engineer the bitstream. Not likely an efficient use of time.

Eric

On 02/18/2010 09:21 AM, Rainer Buchty wrote:
> On Thu, 18 Feb 2010, cheater cheater wrote:
>
>> Assumedly the FPGA could come up with the bitstream and feed it into
>> itself?
>
> That you can do, assuming that the FPGA has access to external memory
> where it finds the bitstreams, using the SelecMAP interface.
>
> Rainer
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