Voltage controlled arpeggiator (was Re: [sdiy] Design Process)

[Ian Fritz]

At 10:09 PM 2/15/2010, Oren Leavitt wrote:


>Ian Fritz wrote:
>>At 08:38 PM 2/15/2010, mark verbos wrote:
>>
>>>I don't know if this is what you mean by "priority encoder," but you
>>>can run each output through an XOR gate with the previous one. That
>>>allows only the highest stage that's on to turn on. Sadly, it takes a
>>>4030 for each set of 4 outputs. They add up fast.
>>
>>Ah, but there are also chips to do that.  CMOS 4532 for example. (Only 8 
>>levels, though.)
>>Ian
>
>Add a few OR gates (a 4071) and another 4532 and you've got 16 inputs and 
>4 bits out.
>Add a 4 bit to 16 out decoder (4514 or 4515) to that and you should have 
>"de-overlapped" steps on the first 10 outputs.
>
>- Oren

Yep, that's the idea. And you can chain two 3914's together and adjust the 
levels so you cover 16 steps with your driving signal.

Ian