[sdiy] BLIT/BLEP virtual analogue synthesis

[Eric Brombaugh]

On 08/04/2010 02:39 PM, Wooster Audio wrote:
> What sample bit depth are people using on their FPGA synth audio path?
> I've been going with 18 (the multiplier size) because I haven't been
> able to synthesize larger multipliers due to congestion.

It varies throughout the data path, but in my Spartan designs 18 bit is 
also the norm due to multiplier limitations. In the final stages though 
I carry a full 24 bits into the I2S driver because I have it available 
from the decimator output.

Note that in the Virtex 5 and newer the multipliers have a 25-bit input. 
If you've got the $$ to spend on those parts then you can carry a few 
more bits.

Eric