[sdiy] BLIT/BLEP virtual analogue synthesis

[ASSI]

On Wednesday 04 August 2010, Olivier Gillet wrote:
> Hmmm, how can this prevent it from being linear? It might be a
> convolution by a non-causal, non-bounded support thing, but it's still
> a convolution, isn't it?

In function space, yes.  In actual implementation, no.  It ends up either 
not band-limited or not linear or both.  :-)

> I'm curious about the FPGA bit, and can't help asking a very naive
> question. If a FPGA was to be used for waveform generation, wouldn't
> it make more sense to use it to render at a 10 MHz or 20 Mhz clock
> rate the very naive things (phase_ < 0x800000 ? -32768 : 32767 for
> square, etc...) like older sound chips did?

Yes, but there's got to be a DAC on the end of the signal chain and the one 
I'm using clocks at 192kHz currently.  Too much oversampling doesn't really 
buy you much, but needs lots of resources.  If you only want a single 
oscillator or two, brute-forcing high sample rates is probably even a good 
option, but I'm looking to have many oscillators and I don't even want to be 
completely alias-free.


Achim.
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