[sdiy] BLIT/BLEP virtual analogue synthesis

[ASSI]

On Wednesday 04 August 2010, Olivier Gillet wrote:
> Isn't band-limiting (low-pass filtering at half the sampling frequency)
> linear?

Low-pass-filtering might or might not be linear, but bandlimiting (aka 
brickwall filter) most certainly isn't.  It is defined as an aperture 
function in the spectral domain which produces an infinite, non-causal 
impulse response in the time domain, so it isn't even realizable.  That's 
what all the fuzz with window functions is about (and BLIT/BLEP also use 
them for their bandlimited waveforms).

I've got a half-assed version of DPW implemented in an FPGA and I can 
certainly recommend it for the efficiency.  It's half-assed because the 
amplitude scaling is currently done by shifting instead of division, leading 
to 6dB ripple.  I probably won't implement it as a division (although a 
radix-4 divider or so in BRAM might possibly be fast enough), more likely a 
table-lookup followed by an iteration.  If the amplitude update is close 
enough after the lookup and then converges to the true value over a few 
samples, I don't think anybody is going to hear that at 192kHz...


Achim.
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