[sdiy] PWM DAC techniques

[Tom Wiltshire]

Hi Nicolas,

> One thing I see with the low cost approach is DACs done via PWM.  But with CVs, to avoid stepping we want probably 10 bits or better and this puts the PWM freq down in the audio range, which then requires heavy filtering and that of course limits the slew rates and settling times.

It does, but maybe not too much. You don't say which microprocessor you're using, but the PIC PWM module will count 20MHz pulses, which gives you a 19.5KHz PWM freq at 10 bits - in the audio range, but only just. You can filter this at (say) 2KHz and still expect a 0.5mS response from your CV. Compare with the Waldorf Wave, which updates its envelopes about every 20mS!

> An idea I am thinking about (tell me if it is stupid) - set up a PWM timer with 5 bit resolution, giving a PWM frequency above the audio range and drive it from the most significant 5 bits of my CV value.  Get it to give me an interrupt on each cycle and count those interrupts with a second 5 bit phase value.  Compare that phase value to the least significant 5 bits of my CV value and up to that phase point run the main PWM timer at one higher than it would otherwise be.  Sorry, not very well explained, but for example I would output the value x0E3 (00111 00011) as 8, 8, 8, 7, 7, 7, ... (29 7s), 8, 8, 8, 7, 7, 7, 7, ...  Once filtered, this would still give 10 bit accuracy with a slow settling time in the milliseconds, but at least most of the energy would be above audio range (only the least significant bits would be encoded in the audio range) so the filtering required would be less.  By getting cleverer with how the extra bits are distributed, for
> example 8, 7, 7, 7, 8, 7, 7, 7, ..., settling time could be improved and audio energy reduced further, but the algorithm would require more computation, which maybe isn't worth it.  Does this make sense?  Has it been done before?  Is it commonplace?  Is it worthwhile?

Remember that the update rate doesn't have to be the same as the PWM frequency. I tried to fit three LFOs into a PIC 16F767 (which has three PWM modules) but I ran out of calculation time between the interrupts given the 19.5KHz output rate. At first I tried halving the output rate to 9.75KHz, but this really was far too low. The solution was to stick with 19.5KHz, but output each sample twice (e.g. only recalculate sample values every other interrupt). This gave me twice as much time without reducing the PWM frequency. It sounds to me like this type of approach might enable you to get the higher output rate you're after without having to do such complicated tricks (which I admit I didn't manage to follow completely.)

> Idea number two (again, please tell me if this is silly) is to use two PWM outputs, both with 5 bit resolution running above audio range.  One for the most significant 5 bits and one for the least significant 5 bits.  Then combine those two pins on the chip with a DAC ladder, except instead of R2R it would be R32R or whatever to correspond with the difference in significance of the two outputs.  Has this been done?  Is it common?  Is it a waste of time?

Yes, it's been done. No, it isn't common. No, it's not a waste of time - there's charm in making it work without the extra DAC chip.

> Thanks for reading this far.  I know you'll probably just tell me to spend a extra few dollars and get a proper DAC, but I can't help wondering ...

It's good to wonder, and even better to try it and see. My experience has been that its amazing what you can get away with!

If you decide you do want a DAC, the Microchip MCP series DACs are cheap, go to 12-bit, and offer 2 outputs in an 8-pin DIP. I've also successfully bit-banged the serial input they need, so you don't even need an SPI pin.

Good luck!

Tom