[sdiy] PWM DAC techniques

nicolas nicolas3141 at yahoo.com.au
Mon Aug 2 12:44:51 CEST 2010


Hello

I am new to microcontrollers and looking at wetting my toes with some CV processing, maybe an LFO or ADSR a la Tom Wiltshire's.  I am hoping that the collective wisdom can help me with a little design problem.

One thing I see with the low cost approach is DACs done via PWM.  But with CVs, to avoid stepping we want probably 10 bits or better and this puts the PWM freq down in the audio range, which then requires heavy filtering and that of course limits the slew rates and settling times.  So the proper solution is a proper DAC.  But just for the mental exercise, can the PWM thing be done in a better way for synth use?  I think most of the common usage of PWM DACs is for motor or lighting control, so the conventional approach might not be the best for synths.  What techniques have been used in the past?

An idea I am thinking about (tell me if it is stupid) - set up a PWM timer with 5 bit resolution, giving a PWM frequency above the audio range and drive it from the most significant 5 bits of my CV value.  Get it to give me an interrupt on each cycle and count those interrupts with a second 5 bit phase value.  Compare that phase value to the least significant 5 bits of my CV value and up to that phase point run the main PWM timer at one higher than it would otherwise be.  Sorry, not very well explained, but for example I would output the value x0E3 (00111 00011) as 8, 8, 8, 7, 7, 7, ... (29 7s), 8, 8, 8, 7, 7, 7, 7, ...  Once filtered, this would still give 10 bit accuracy with a slow settling time in the milliseconds, but at least most of the energy would be above audio range (only the least significant bits would be encoded in the audio range) so the filtering required would be less.  By getting cleverer with how the extra bits are distributed, for
 example 8, 7, 7, 7, 8, 7, 7, 7, ..., settling time could be improved and audio energy reduced further, but the algorithm would require more computation, which maybe isn't worth it.  Does this make sense?  Has it been done before?  Is it commonplace?  Is it worthwhile?

Idea number two (again, please tell me if this is silly) is to use two PWM outputs, both with 5 bit resolution running above audio range.  One for the most significant 5 bits and one for the least significant 5 bits.  Then combine those two pins on the chip with a DAC ladder, except instead of R2R it would be R32R or whatever to correspond with the difference in significance of the two outputs.  Has this been done?  Is it common?  Is it a waste of time?

Thanks for reading this far.  I know you'll probably just tell me to spend a extra few dollars and get a proper DAC, but I can't help wondering ...

Regards,
Nicolas Woollaston



      



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