[sdiy] Non-inverting output buffer

[David G. Dixon]

Good work, Andre!
 
> Tomorrow I'll look how high R2 can go. It would probably be futile
> to raise it above R1, though.

What you'll find is that raising R2 will eventually cause your output to
fall unless the load also increases, and that the value of R1 will make no
difference.  For example, if you replaced R2 with a 3.9k resistor, then you
would still generate 7.4V across a 10k load, but only about 2.75V across a
1k load.

The ratio of the tolerable load impedance RL to the value of R2 (RL/R2)
decreases as the value of R2 increases.  This is because the opamp can only
source a certain amount of current.  At a very low opamp load impedance (R2
+ RL), this current is reached when the opamp output voltage is less than
its maximum (typically V+ minus two diode drops).

In my simulations, the maximum output current of TL072 is 25.677mA, and the
maximum output voltage (for a 15V + rail) is 13.477V.  The combination of R2
and RL is a simple divider.

Hence, the maximum current is reached when RL is equal to or less than the
desired output voltage divided by the maximum current.  For an output
voltage of 7.4V and a current of 25.677mA, this critical impedance is
7.4/25.677 = 290R.  Below this minimum load impedance, the circuit simply
cannot supply enough current to drive the load at 7.4V.

Above this load impedance, the critical ratio of RL/R2 to obtain 7.4V is
about 1.166.  Hence, for R2 = 3.9k, any load greater than 4.75k should be
OK.  In fact, it is just a little bit higher (about 4.9k) because the opamp
is not a perfectly stiff source.

If I'm wrong, I'll buy you a beer or three at the bistro of your choice when
I return to Paris next month.  (Oh hell, I'll do it even if I'm right!)