[sdiy] Non-inverting output buffer

[David G. Dixon]

> >> how do you choose R1 ?
> >
> > If you use it at all, it should match impedance seen at he input -
> > this gives the best possible offset drift.
> 
> R1 must be used if C or R2 are. Otherwise you simply short circuit the
> capacitive load to the negative input terminal (and get oscillation and
> other fun things).


Can you state, for dummies like me, just exactly what would constitute a
"capacitive load" which might (or definitely would) cause oscillation of an
unadorned follower?

E.g., what would the input capacitance of the load have to be, how small
would the load impedance have to be, and how would this capacitance have to
be presented relative to the load (in series, in parallel, either, etc).

I'm presuming that the impedance of this load would have to be very small,
or else the capacitance would have to be in series with this impedance, and
would have to come first.  A decoupling cap, a cable, a long PC trace, or
the channel of a JFET switch might fit the bill.  Do I have the right idea,
or am I smoking crack (as per usual)?