[sdiy] Non-inverting output buffer

[David G. Dixon]

Andre,

Based on a Multisim simulation using TL072BCP, I believe the question is
moot, since the 75R resistor on the opamp output limits the gain to about
0.9926 regardless.  A gain of 1.0000 is only achieved when that 75R resistor
is removed.

With that resistor removed, Multisim simulation suggests that the gain is
completely insensitive to the feedback resistor value between 0 and 5M (the
highest value pot I could put in) and also to the presence or absence of the
feedback capacitor, regardless of the frequency between 1Hz and 20kHz.  At
20kHz, the opamp output lags the input by about 46ns, creating about 0.004%
THD in a sine wave.  This is an artifact of the opamp.

So what's wrong with a simple follower (R1 = 0, R2 = 0, no cap)?

> Excuse the basic question, but in a non-inverting output buffer
> like this one
> 
>                    R1
>         +---------^v^v---------+
>         |                      |
>         +------||----+         |
>         |     33pF   |         |
>         |  |-_       |         |
>         +--|- -_     |   R2    |
>            |   _-----+--^v^v---+--o  OUT
>   IN  o----|+_-          75
>            |-
> 
> how do you choose R1 ?
> 
> The goal is to have a gain of 1.0000 from DC to 20 kHz for loads
> down to 10 k.
> 
> --
> André Majorel http://www.teaser.fr/~amajorel/
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